STMbench7 (C++)

STMbench7 (C++)
STMBench7 is a benchmark for evaluating Transactional Memory (TM) implementations.
The benchmark aims at providing a workload that is both realistic and non-trivial to implement in a scalable way. The implementation (in Java and C++) contains a lock-based synchronization strategy that can serve as a baseline for comparison with various TMs.

The underlying data structure consists of a set of graphs and indexes intended to be suggestive of many complex applications, e.g., CAD/CAM. A collection of operations is supported to model a wide range of workloads and concurrency patterns. Companion locking strategies serve as a baseline for TM performance comparisons. STMBench7 strives for simplicity. Users may choose a workload, number of threads, benchmark length, as well as the possibility of structure modification and the nature of traversals of shared data structures.

The C++ release compiles with the Dresden TM compiler (DTMC) from Velox.
VELOX Release Download Release Date
Release 3 01.03.2011