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Beefarm is an FPGA-based multiprocessor system-on-chip that can emulate an arbitrary number of MIPS R3000 processors through a ring bus. Using FPGAs, real hardware can be emulated to test software and hardware components from the VELOX Stack. This open-source release of the Beefarm FPGA implementation for Transactional Memory (TM) serves as a prototyping platform for researchers working in TM and will demonstrate proof-of-concept for Hardware Transactional Memory (HTM) implementation.


Participants came from near and far to gain in-depth knowledge about the VELOX TM Stack during the HiPEAC Computing Systems Week  co-located with the Barcelona Multicore Workshop 2010 (presented by Microsoft Research, Barcelona Supercomputing Center and HiPEAC Project). VELOX Team members Adrián Cristal and Osman Unsal of Barcelona Supercomputing Center (BSC) in Spain, Torvald Riegel of Technische Universitaet Dresden in


The VELOX Project was prominently featured in a week long series of all things multi-core ranging from formal keynotes to focused workshops. During HiPEAC Systems Computing Week, Patrick Marlier of the Université de Neuchâtel in Switzerland presented the VELOX Project as a part of the Programming Models and OS Session. Later in the week, Martin Pohlack of Advanced Micro Devices GmbH in Germany gave a brief introduction to AMD's Advanced Synchronization Facility (ASF) as a part of the Barcelona Multi-Core Workshop.


The VELOX Project is presenting a hand's on introduction to the VELOX Transactional Memory Stack in a half--day tutorial as a part of HiPEAC Computing Systems Week held in conjunction with the Barcelona Multicore Workshop.  These events are co-sponsored by the HiPEAC Project, the Barcelona Supercomputing Center and Microsoft Research.

Supercomputing Online

Read the full article at VELOX Project launches first fully integrated Transactional Memory Stack or download the pdf.

HPC Wire

Read the full article at VELOX Project launches first fully integrated Transactional Memory Stack or download the pdf.


The first fully integrated VELOX Stack is now available for download at  This release shows VELOX Applications (RMS-TM, C application and QuakeTM) running on VELOX System Software (DTMC Compiler and TinySTM Runtime, Deuce Runtime) and on VELOX Hardware Simulator (PTLsim-ASF).


VELOX-funded researchers from Advanced Micro Devices, Technische Universitaet Dresden and Universite den Neuchatel have published their joint work of "Evaluation of AMD's Advanced Synchronization Facility within a Complete Transactional Memory Stack" at the EUROSYS 2010 conference in Paris, France.


The VELOX Project sponsored an Integration Seminar from 27 - 29 January in Champéry, Switzerland.  Fifteen members of the Core Technical Team attended a General Assembly Meeting on 27 January in order to discuss approaches to integrating the complete VELOX Stack in addition to the prioritization of features for each release of the complete stack.  In addition, more than 20 additional individual contributors to the project joined in the meeting from 28 January in order to facilitate a common understanding of the various TM Solutions that have been implemented in the VELOX components and products of the stack and to disseminate th


AMD's Operating System Research Center plays a central role in the EU-funded VELOX project, which targets an integrated approach to transactional memory (TM) on multi and many-core computers.